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Computer Architecture: A Quantitative Approach (Anglais) Broché – 25 octobre 2011
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Description du produit
Revue de presse
"What has made this book an enduring classic is that each edition is not an update, but an extensive revision that presents the most current information and unparalleled insight into this fascinating and fast changing field. For me, after over twenty years in this profession, it is also another opportunity to experience that student-grade admiration for two remarkable teachers." ― From the Foreword by Luiz André Barroso, Google, Inc.
"This is an academic textbook that is also suitable for a far broader readership. Each chapter is organised in the same structure, with the main content supported by case studies and exercises… Having read this book I now have a far better understanding of why processors from all the different designers and manufacturers are so different. Memory hierarchies, multicore architectures and compiler optimisation are all covered in great detail. I was particularly interested in their discussion of graphical processing units and how they are suitable for far more than just graphical workloads… What is great about this book is that it moves with the times. There is a lot of content on processors for mobile computing, and power usage is a pervasive theme. At the other extreme there is an excellent chapter on warehouse scale computers, which offers tremendous insight into the cloud computing infrastructure provided by Google, Amazon and others. If your job has anything to do with IT infrastructure then I recommend this book as a must-read. As an academic text book it has both depth and breadth. And if you're just interested in the topic you'll gain a huge amount of insight into the fundamentals of computer architecture."--The Chartered Institute for IT
Présentation de l'éditeur
Computer Architecture: A Quantitative Approach, Fifth Edition, explores the ways that software and technology in the cloud are accessed by digital media, such as cell phones, computers, tablets, and other mobile devices. The book, which became a part of Intel's 2012 recommended reading list for developers, covers the revolution of mobile computing. It also highlights the two most important factors in architecture today: parallelism and memory hierarchy.
This fully updated edition is comprised of six chapters that follow a consistent framework: explanation of the ideas in each chapter; a crosscutting issues section, which presents how the concepts covered in one chapter connect with those given in other chapters; a putting it all together section that links these concepts by discussing how they are applied in real machine; and detailed examples of misunderstandings and architectural traps commonly encountered by developers and architects. Formulas for energy, static and dynamic power, integrated circuit costs, reliability, and availability are included. The book also covers virtual machines, SRAM and DRAM technologies, and new material on Flash memory. Other topics include the exploitation of instruction-level parallelism in high-performance processors, superscalar execution, dynamic scheduling and multithreading, vector architectures, multicore processors, and warehouse-scale computers (WSCs). There are updated case studies and completely new exercises. Additional reference appendices are available online.
This book will be a valuable reference for computer architects, programmers, application developers, compiler and system software developers, computer system designers and application developers.
- Part of Intel's 2012 Recommended Reading List for Developers
- Updated to cover the mobile computing revolution
- Emphasizes the two most important topics in architecture today: memory hierarchy and parallelism in all its forms.
- Develops common themes throughout each chapter: power, performance, cost, dependability, protection, programming models, and emerging trends ("What's Next")
- Includes three review appendices in the printed text. Additional reference appendices are available online.
- Includes updated Case Studies and completely new exercises.
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les divers sujet sur le fonctionnement des architecture y sont abordé (optimisation, fonctionnement du pipeline,...).
Commentaires client les plus utiles sur Amazon.com
It does not cover the absolute latest processors. But it doesn't have to. It will give you the background needed that when you go to the website that have technical details of a new architecture (e.g. Ars Technica), chances are good you will know the concepts they reference.
Who shouldn't buy this: Programmer's in high level languages expecting to learn some black magic way to speed up your code. Even assembly language programmers have been mostly sidelined by the power of a modern CPU to optimize high-level languages.
This book is heavy enough to concuss someone with it with a good swing, and there's almost an equal number of pages in accompanying appendices in digital format. That is a lot of material, but it goes a great deal into the minutiae of the low level functions that you probably didn't learn correctly the first time around. Knowledge of basic digital design, organization, a C-based language and familiarity with generic assembly is recommended before tackling this thing.
But it seems that it is too much for a single class.